Paper
Efficient Implementation of LPC Algorithm for Voice Decoding Process
- Authors:
- Rached Tourki; Fatma Sayadi; Mohamed Atri
- Abstract
- This paper presents different implementations of the LPC (Linear Predictive Coding) algorithm used in the majority of voice decoding standard. The windowing/autocorrelation bloc is implemented by three different versions on an FPGA Spartan3 with Microblaze soft core processor using Embedded Development Kit (EDK). Allowing the possibility to integrate the soft core processor a first solution consists of a pure software implementation of the LPC using this core RISC processor. Second solution is pure hardware architecture implemented using VHDL based methodology starting from description until integration. Finally, hardware/ software co-design is given. The hardware part consists of the autocorrelation core that solves the part of the algorithm with higher computational costs. The software part consists of the embedded soft core processor that manages the windowing bloc. The implementation results are presented, a comparison is then made between the three alternative architectures with different data lengths for performance and area.
- Keywords
- Linear Predictive Coding; System on Programmable Chip; FPGA; Co-design
- StartPage
- 11
- EndPage
- 16
- Doi