Volume 2 Issue 1

Authors: Zhao Wang; Carl Sechen

Abstract: This paper proposes a new estimation algorithm that accurately predicts the delay, slew rate at each wire endpoint based on an RC extraction, regardless of the number of RC sections and the effective capacitance (Ceff) seen by a gate. In addition, an improved slew rate estimation metric based on prior work is introduced. The delay and edge rate results compare favourably with respect to HSPICE simulation results and are more accurate than those from the leading commercial static timing analysis tool.

Keywords: Delay Estimation; RC Networks; Equivalent Resistor